MOS transistors may include metal silicide contacts on the top semiconductor surface including on the source/drain regions and on the gate electrodes in the case of polysilicon to lower the contact resistance and thus improve device performance. Before forming the silicide contacts, contact (or via) holes are cut though one or more dielectric layers above semiconductor surface followed by a silicide pre-clean. The critical dimension (CD) of the contact holes should be large enough to avoid high resistance (or open) silicide contacts, yet small enough in size to avoid leakage (or shorting) that may result from the contact hole CDs being above a certain size (oversized CDs).
In an attempt to address this problem, the CD at the contact mask photolithography level may be patterned to provide a reduced CD to compensate for the contact CD size increase resulting from the silicide pre clean. However, photolithography and etch generally have a small process window to produce reduced CD contact holes reliably, which can result in printing failures that cause high resistance (or electrically open) contacts.